CD4029 Binary/BCD-Decade Up/Down Counter

High-voltage counter with synchronous or ripple-clocking options

• Part number: CD4029BMS
• DC Supply Voltage Range (VDD): -0.5V to +20V
• Input Voltage Range (All Inputs): -0.5V to VDD +0.5V
• DC Input Current (Any One Input): 10mA
• Operating Temperature Range: -55C to +125C
• Storage Temperature Range (TSTG): -65C to +150C
• Lead Temperature (During Soldering): +265C

Features:

• High-Voltage Type (20V Rating)
• Medium Speed Operation: 8MHz at CL = 50pF and VDD – VSS = 10V
• Multi-Package Parallel Clocking or Ripple Clocking
• Preset Enable and Individual Jam Inputs

CD4029 consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN (CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a CARRY OUT signal are provided as outputs.

A high PRESET ENABLE signal allows information on the JAM INPUTS to preset the counter to any state asynchronously with the clock. A low on each JAM line, when the PRESET-ENABLE signal is high, resets the counter to its zero count. The counter is advanced one count at the positive transition of the clock when the CARRY-IN and PRE-SET ENABLE signals are low.

Advancement is inhibited when the CARRY-IN or PRESET ENABLE signals are high. The CARRY-OUT signal is normally high and goes low when the counter reaches its maximum count in the UP mode or the minimum count in the DOWN mode provided the CARRY-IN signal is low. The CARRY-IN signal in the low state can thus be considered a CLOCK ENABLE.

Binary counting is accomplished when the BINARY/DECADE input is high; the counter counts in the decade mode when the BINARY/DECADE input is low. The counter counts up when the UP/DOWN input is high, and down when the UP/DOWN input is low.

Multiple packages can be connected in either a parallel clocking or a ripple-clocking arrangement as shown in Figure 17. Parallel clocking provides synchronous control and hence faster response from all counting outputs. Ripple-clocking allows for longer clock input rise and fall times.

The CD4029 is supplied in these 16-lead outline packages: Braze Seal DIP H4X, Frit Seal DIP H1F, Ceramic Flatpack H6W.

For more detailed specifications, refer to the related document: CD4029 IC Datasheet.

* Images are for illustration only; actual product may vary.